1. Technical Field
The present invention relates to a fractional N-PLL circuit, an oscillator, an electronic device, and a moving object.
2. Related Art
An oscillator in which a fractional N-PLL circuit is connected to a rear stage of an oscillation circuit and setting of a division ratio of the fractional N-PLL circuit is changed by an external terminal to output plural frequencies is known. A phase locked loop (PLL) circuit feeds back a voltage based on a phase difference between a reference signal and a feedback signal obtained by dividing an output signal of voltage controlled oscillator by a division ratio Q to the VCO to obtain an output frequency corresponding to Q times the reference frequency. For example, since the fractional N-PLL circuit switches plural integer division ratios using a delta-sigma modulated signal and obtains its average value as the division ratio Q, it is possible to set the division ratio Q as a fraction in addition to an integer. Further, in order to widely secure an output frequency range of the fractional N-PLL circuit, a method for using the VCO with a range switching function is also known. Such a VCO may reduce a frequency conversion gain in each range while securing a wide frequency variable range by allowing selection of plural ranges having different output frequency ranges. If the frequency conversion gain is reduced, frequency dependency on voltage noise of a peripheral circuit is reduced, and thus, it is possible to suppress phase noise characteristics of an output signal of the VCO, and to enhance resolution of frequency response with respect to a control voltage. The fractional N-PLL circuit that includes a VCO with a range switching function and switches plural division ratios using delta-sigma modulation is disclosed in JP-A-2012-28835, for example.
In the fractional N-PLL circuit in the related art using the VCO with the range switching function and the delta-sigma modulation circuit, as disclosed in JP-A-2012-28835, at the time of starting or when the setting of the division ratio is changed, an optimal range is searched for while switching the range of the VCO. Thus, for example, when performing a high speed search using a binary search method or the like, an output frequency of the VCO may become a high frequency which cannot be obtained in a steady state (in a normal operation). It is necessary that the delta-sigma modulation circuit follow the feedback signal to be operated, and similarly, it is necessary that the delta-sigma modulation circuit is operated at a high frequency which cannot be obtained in the steady state during the search of the range of the VCO. Thus, in the fractional N-PLL circuit in the related art, there is a problem in that the delta-sigma modulation circuit should have a surplus specification so as not to perform an erroneous operation during the search of the range of the VCO, which causes an increase in circuit size and power consumption.